Datalogging

Datalogging can simplistically be broken down into 4 basics, 1- disrupting the code, 2- executing the patch code, 3- shadowing payloads, 4- parsing data with the QH With the new "Standardized" ADX datalogging its simplified significantly. This will prevent errors when jumping between strategies and makes it very easy to create datalogging support as well as maintaining your adx since you only keep one master file. The patch code stays consistent for all defs except for the raminit flag that you took out the console routine in order to call the patch code routine. Once you've located the console call routine, insert your CALL to your patch code address. If your console call routine is not within' bank 8 you will have to update the bank calls in the patch code. I have listed patch codes for the logging list and patch in different banks to make it easier to implement in the chart below for reference.

This table below is outdated

Strategy Datalogging Addresses
Date	Strategy	Banks	Code Address	Code Size	List Address	List Size	RAMINIT Flg	Configuration (Console,Call,Call,List)
2017-07-03	GUFX	1	8x DF40	159	8x EE00	128	xx xx xx	Single Bank
2017-07-03	RZASA	4	8x FF57	169	0x FE00	298	71 EF 90	8 -> 8 -> X -> 0
*2017-07-03	CRAJ0	4	8x FF57	169	0x FE00	194	71 EF 90	8 -> 8 -> X -> 0
2017-07-03	CVAF1	4	8x FF57	169	0x FE00	xx	71 EF 90	8 -> 8 -> X -> 0
2017-07-03	FBFG2	4	8x FF57	169	0x FF00	204	71 EF 92	8 -> 8 -> X -> 0
2017-07-03	FBGI0	4	8x FF57	169	0x FE00	xxx	71 EF 92	8 -> 8 -> X -> 0
	OMAE2	4	8		0			8 -> 8 -> X -> 0 ?
	CMAI6	4	8		0			8 -> 8 -> X -> 0 ?

*2017-06-09b code shadowed to 1x1F20 instead of C000, change of 3 bytes, 8xff5f from 0x00 to 0x20; 8xff60 from 0xc0 to 0x1f; 8xfff8 from 0xc0 to 0x1f

Part 1 - RAM Addresses

Payload List - in ADX due to DMA logging

The following is the ORDERED list that MUST be used for the Standardized ADX to function correctly.

NOTE: To skip over an parameter simply log 1F20. As for the ops list if you do not have the ddress for a bitmask then set the address to FFFE which will skip over that stacked bit to continue on with the remaining stacked bits.

This list is outdated

List A - Word Shadowing - Payload List addressing is posted above. See Strategy DataLogging Address Table Above
ADX Offset	Descriptions	Shadow Address	PID	XX Address XX	Equation	Units
	00 00 == STOP MUST BE HERE to END MARKER LIST A
110	BIDI Port A2	1F8D	flags	-	flags	flags
109	BIDI Port A1	1F8C	flags	FFFF	flags	flags
108	knk sensor spark adjustment	1F8B	SPKAD	-	x	x
107	fuel pump voltage	1F8A	FP_INPUT_VLT	FFFF	/16	Volts
105	mbt spark limit	1F88	SPK_M_B_T	0E9A	/128 si	spkadv
103	bdl spark limit	1F86	SPK_BDL	0E90	/128 si	spkadv
101	Fuel Level input	1F84	IF_FUEL_LVL	02F8	x	x
99	Fuel tank pressure	1F82	TPR_ENG	F1CC	x	x
97	Est Fuel Consumption	1F80	FLI_FUEL_SUM	148E	/33554432	lb/m
95	deciphas enrichment fuel	1F7E	LOST_FUEL__A	F112	/32768	Lambse
93	Feeback Spark	1F7C	SPK_ACTUAL	F0DE	/4	dBtdc
91	Calc pump fuel flow	1F7A	FP_FLOWRATE	F322	/16384
89	Fuel Rail Pressure	1F78	FIP_DELTA	F0F2
87	modulated fuel pump dutycycle	1F76	FPUMP_DC	1132	/32768	%duty
86	lost alternate fuel lambse	1F75	LOST_ALT_MUL		/128	lambse
85	cold fuel lambse adder	1F74	FUL_ADD_CLD	FFFF	/128	Lambse
83	filtered Acceleration Rate	1F72	VS_RATE	1274	/ 512	MPH/sec
81	inferred engine oil temp	1F70	INF_EOT	F04E	x	x
80	flags (spark)	1F6F	flags
79	Spark Source	1F6E	SPK_SOURCE	FFFF	x	Ref
77	inferred ambient temp	1F6C	INFAMB_KAM	147e	x	x
75	trans Input/Output Ratio	1F6A	SPD_RATIO	1226	/16384	Slip Ratio
73	Trans oil temp	1F68	TOT	02AC	/8	Temp F
72	unassigned	1F67	unassigned	-	X	X
71	Engine Tq into TCC	1F66	TQ_NET	FFFF	/ 0.5	ft/lbs
70	flags (trans)	1F65	flags
69	Trans Line Pressure	1F64	TV_PRES	FFFF	/2	psi
68 MOVED	FN725A_ACT	1F63	spk_bdl_act_retard	-	x	moved as of 10-13-17
67	Gear Commanded	1F62	GR_CM	FFFF	/2	Gear
65	OSS RPM	1F60	NOBART	1264	/4	RPM
63	TCC PWM DutyCycle	1F5E	BCSDC	1230	/32768	TCC_DTY
62	unassigned	1F5D	unassigned	-	X	X
61	total fault codes stored	1F5C	NUM_CODES	FFFF	X	X
59	hego2 voltage	1F5A	IEGO21	0164	/64
57	driver side ltft	1F58	KAMRF2	07A6
55	driver side stft	1F56	LAM_FINAL2	0450
53	knk sensor 1 voltage	1F54	KNK_SNS1_CNT	F14A	X	Volts?
51	transient fuel time const	1F52	EFUEL/TFC_TAU or TSIEF	01B6	512	sec?
49	transient dynamic fuel trapped fraction	1F50	EFTRFF/TFC_DYNX or AEFUEL	01B8	512	%
48	park drive lever position	1F4F	PDL	-	x/2	7=p;6=r;5=n;4=od;3=d;2=2;1=1
47	desired idle rpm	1F4E	DSDRPM	FFFF	/4	rpm
45	injector pulse width	1F4C	FUELPW1	012C	/ 0.5	pw (in ticks)
44	isc mode	1F4B	ISCFLG		X	state
43	throttle position flag	1F4A	APT	FFFF	X	state
41	throttle position voltage	1F48	TP	0122	/64	ADCnts
40	cyl head temp or iat2 (cobra/L/HD)	1F47	CHT or IAT2	-	x	temp F
39	battery voltage	1F46	VBAT	FFFF	/16	Volts
38	flags	1F45	flags
37	flags	1F44	flags	FFFF
36	*vsbar is mph calculated from vss	1F43	VSBAR		/2	MPH
35	*vsbart is mph calculated from oss	1F42	VSBART_RT	FFFF	/2	MPH
33	isc duty	1F40	ISCDTY	0126	32768	%Duty
31	dashpot airmass	1F3E	DASPOT	1418	/4096	lbs/min
29	hego1 passenger	1F3C	IEGO11	015C	/64	ADCnts?
27	passenger ltft	1F3A	KAMRF1	07A4	256	Err%
25	passenger bank1 STFT	1F38	LAM_FINAL1	044E	32768	Lambda
23	dpfe / evp voltage	1F36	EPTBAR or IEVP (WBo2)	014A	/64	ADCnts
21	raw maf voltage	1F34	IMAF or VMAF, or MAPOPE	017E	/64	ADCnts, [Speed Density == /128 = MAPOPE (byte)]
19	inferred load (not PCT_LOAD)	1F32	TOTLDST or MAP	F018	/32768	LOAD
17	filtered TP_REL for shifting	1F30	TP_SS_L or RATCH	F38C	/64	ADCnts
15	percentage of load	1F2E	PERLOAD or MAPPA	1372	/32768	%load
13	Filtered RPM	1F2C	NE	03EA	/4	RPM
11	engine VE	1F2A	LOAD_FG or MAP	0134	/32768	Load, [Speed Density == /8 = MAP (byte)]
9	spark advance	1F28	SAFTOT	1794	/4 (signed)	dBtdc
7	airmass flow	1F26	AM	134C	/1024	lbs/min
6	*inlet air temp	1F25	ACT		/0.5 (signed)	F
5	*engine coolant temp	1F24	ECT	FFFF	/0.5 (signed)	F
3	CL idle isc correction	1F22	IPSIBR	140E	/4096	lbs/min
1	engine run timer	1F20	ATMR1 or ATMR3_HI_RES	15FE	/8	sec
0	null	1F1F	null	does not exist	X	offset 0 - not in list but polled for superlogger offset

*bytes listed in bold = Must be done per byte in List B

REMEMBER: FFFF skips that address for byte or bitmask manipulation.
and FFFE zeros that value for unlogged words.
0x1F4F is set to be a value of 0 or 1 determined by the OL_DES flag done in the bits code.
PDL needs to be moved.

List B - Copy MSB to LSB for odd addesses.
Again, start at the bottom and work up to the top, and most importantly, don't forget to put the Quad 0s to mark the end of the list and continue on to C.

LIST B - SHADOW BYTES
Parameter	Address
	0000 == STOP, END MARKER FOR LIST B
1F8D
BIDI_REG_6A	6A
1F8C
BIDI_REG_54	54
1F8B
SPKAD	1799
1F8A
FP_INPUT_VLT	F30F
1F75
LOST_FUEL_MUL	F114
1F74
FUL_ADD_CLD	1354
1F6E
SPK_SOURCE	0637
1F67
UNASSIGNED	FFFE
1F66
TQ_NET	129A
1F64
TV_PRES	1297
1F63
FN725A_ACT	F225
1F62
GR_CM	1288
1F5D
UNASSIGNED	FFFE
1F5C
NUM_CODES	077A
1F4F
PDL	1270
1F4E
DSDRPM	1449
1F4B
ISCFLG	144D
1F4A
APT	00D0
1F47
CHT or IAT2	11EF
1F46
VBAT	0763
1F43
VSBAR	11CF
1F42
VSBART_RT	127D
1F25
ACT	007B
1F24
ECT	0079

Part 3 - Bit Comparisons
NOTE: Bits can only report when they are on, anything in the off state will
not show an indicator so FFFE can zero out unlogged bytes/words/bits and not
set an incorrect flag button.

REMEMBER: 1FXX == offset to copy to

Bit Flags Reference Values
Bit-0	Bit-1	Bit-2	Bit-3	Bit-4	Bit-5	Bit-6	Bit-7
01	02	04	08	10	20	40	80

List C - Shadow and Stack BitFlags - 1F44, 1F45, 1F63, 1F65, 1F67, 1F6F
1F6F
	INJ8_FAULT Bit 7	6F	02
		0071
	INJ7_FAULT Bit 6	6F	01
		0071
	INJ6_FAULT Bit 5	6F	20
		0071
	INJ5_FAULT Bit 4	6F	10
		0071
	INJ4_FAULT Bit 3	6F	02
		0070
	INJ3_FAULT Bit 2	6F	01
		0070
	INJ2_FAULT Bit 1	6F	02
		006F
	INJ1_FAULT Bit 0	6F	01
		006F
1F65
	FLASH_TCIL Bit 7	65	80
		03B6
	DO_KOEO_TST Bit 6	65	20
		00BE
	FLG_ADAPT_RST Bit 5	65	01
		13F4
	FLG_OLUP Bit 4	65	10
		00B0
	BOO_LVL Bit 3	65	08
		0058
	DSFFLG Bit 2	65	80
		00B1
	CL_THRTL Bit 1	65	80
		00D0
	OCTADJ Bit 0	65	40
		13F2
1F45
	MISFIRING Bit 7	45	02
		00B8
	MIL Bit 6	45	08
		006C
	LEGOFG11 Bit 5	45	80	Hego 1 not switching
		07C2
	KNOCK_DETECT Bit 4	45	20
		00A5
	KNK_FMEM_2 Bit 3	45	02
		07C2
	KNK_FMEM_1 Bit 2	45	10
		07C4
	FRP_FAULT Bit 1	45	80
		04D6
	MASTER_KEY Bit 0	45	20
		1757
1F44
	OL_DES Bit 7	44	02
		0094
	NDSFLG Bit 6	44	80
		009D
	LSF Bit 5	44	80
		0377
	HSF Bit 4	44	80
		014F
	ACCFLG Bit 3	44	04
		00C1
	FUEL_IN_SYNC Bit 2	44	80
		008E
	UNDSP Bit 1	44	04
		0098
	WOT Bit 0	44	01
		0090

To summarize:

first words are payload adresses - List A
second bytes are copying high to low - List B <--- not any more, simply log a word
3rd bits are copying bits flags to 0 - List C
Note: Max Polling Limit of the QH is 102 bytes

Below is outdated

We saved the best for last, now that the patch is written we are ready to start requesting RAM addresses to poll. But not just so fast there young grasshoppah, it is very important that you keep track of the order in which you poll your addresses. If you have setup the patch code with registers in the correct order then you are done! Simply enable the datalogging patch code in your tune and use the DECIPHA.ADX datalogging file to datalog. The following is the ACTUAL functioning of the datalogging in detail for your knowledge.

8065 REGISTERS are from 0x000 to 0x3FF, the QuarterHorse cannot access those addresses directly. Directly addressable RAM begins at 0x400 on up. Since you cannot access the ecu's REGISTERS directly, In order to datalog these registers you must write patch code to copy/shadow REGISTERS to MBUS where they are visible. For simplicity and to reduce errors, the majority of the QH_CONFIG can be reused from the available strategy files, but for the sake of understanding, I will break down exactly what is going on so you have a much better understanding of it and can write your own datalogging files for the strategy your working on. The QH Write Patch command is fairly simple once you know how it works.

I highly recommend referencing the DECIPHA.ADX file to follow along. The following applies to the Quarterhorse from Moates.net using Tunerpro RT.

To follow along open up the ADX Editor in TunerPro and cruise on down to Commands >> QH_Configure QH for Payloads [QH_CONFIG] tab

I highly recommend overwriting the raminit flg at the end of console routine and calling the patch code then using 0x1F20 to shadow for datalogging.

< 0 > Configure QH for Payloads [QH_CONFIG]

This is the actual list of steps IN ORDER that TunerPro will perform to datalog and MUST ALWAYS be in this exact order:

TunerPro Command Structure
1	(Pause for Data Rate) 100msec [WAIT]
2	reQuest QH Packet
3	Reply to Q - 400 msec (0x4F)

< 1 > Pause for Data Rate

Pause for Data Rate; just as it states, the QH must reply with its data rate before anything can function, its nothing more than a 100ms wait timeout

< 2 > reQuest QH Packet - KEEP TRACK OF OFFSETS!!!!

The order in which the addresses are polled below will determine the TunerPro offset for each VALUE so when it comes time to configuring the values you must keep track of the offset they are at. This is a VERY TEDIOUS PROCESS THEREFORE, If you poll your payloads in the order I have defined below then you can use my DECIPHA.ADX and the hard part is already done for you!!!!!!!! I recommend you log all the critical payloads I have defined below in the ordered layed out. You can then log any additional payloads as you desire AFTERWARDS. If doing so, be sure to you configure a new dashboard for your additional values.

Also note, the QH has a hard poll limit of 109 bytes per query. I have created my TunerPro dash to be what I find the most efficient, I highly recommend you follow suit as it is a significant time investment to create an in depth dashboard. I will keep the RAM addresses here to personally keep track of the payloads and value offset but also for others to reference. If you look at the registers you'll see many are in the same location throughout most if not all strategies. This can give you a head start in many cases. If you do develop any datalogging support I highly encourage you to send me your logging list and I will add them to my listing. This way if I update the structure of the universal ADX I can update the logging list as well. It makes it significantly easier to manage updates as I can very quickly update 20+ logging lists on multiple strategy files by simply copy and pasting.
NOTE: Only addresses in the 0x000 - 0x3FF range must be shadowed up above in the 2nd step of writing the patch code "INSERT Registers Payloads." I shadow all registers even upper memory which is directly accessible over the MBUS because it allows me to have a STANDARDIZED offset for any given payload.

51 is the Query code in ASCii = Q
0x6D is the sum of elements to poll, 0x6D = 109 bytes

NOTE: 0x6D == 109 is the maximum bytes of data the QuarterHorse can poll per Query.

0x01 0x01 0x1F 0x1F
read 1 byte(s) from QHRam1 address 1F1F; this has an offset of 0 since it is the first address being queried
keep in mind, the address requested will be polled in the order you query them
If you've been paying attention your probably thinking right now, wtf decipha?? why 1F1F??, simple...
With the addition of the SuperLogger all offsets get pushed out 1 byte, by omitting the first byte while
polling with the non-superlogger, it keeps the same adx viable for use with and without!!!!!!

Thus, 1F20 = offset byte 1

More Examples of query commands:

0x01 0x01 0x02 0xA8
read 1 byte from ""RAM1"" address 02A8, this has an offset of byte 8 (which you don't need to know, but for more understanding, it's shadowed at 1xDD98)

0x02 0x01 0x02 0xC0 = offset 9-10, since the prior address was only 1 byte, these byte will be placed in the next address, 1xDD99 to 1xDD9A

0x01 0x01 0x03 0x6F = offset byte 1

and so on and so fourth...

8>Payloads - RAM ADDRESS LIST This is where the RAM Addresses are shadowed, reference the Payloads section for the list of RAM Addresses.

9>Config Reply to Q request a reply and that patch code is complete, now its time to move on to the "Values" and add in the payloads, be mindful of your offsets and byte sizes!!!

< 2 > Insert Register Payloads

57 36 05 DF 9A 4E 00 78 00 ....CONTINUE ADDRESS LIST OF REGISTERS...

0x57 is W in ASCii which is the QH command to WRITE
0x36 is the # of RAM BYTES in HEX of the code to be copied to shadow memory ( 2 bytes taken per register )
0x05 is the QH MEMORY SLOT to write the patch, see the table below for reference.

QH Write Modes
Note: 0x05 is to write up to a 256 bytes at a time, you can also write to 0x15 if you choose to write a patch for each byte!!!! Wayyy too time consuming to even be considered. Again, with 0x05 you can only write 256 bytes at a time, if your patch code is longer than that you'll need to split it up into more Send Commands.

The QuarterHorse command mapping is listed in the table below for reference.

		QH MEMORY MAPPING
		01	= QH Memory Bank 1
		05	= ROM Bank 1
		15	= ROM bank1 (1 byte)
		06	= ROM Bank 8
		16	= ROM bank8 (1 byte)
		07	= Upper Memory (single bank tunes)
0xYY	HSB of address YYzz to write patch code
0xZZ	LSB of address yyZZ to write patch code

Note: single bank EEC-IV use bank 07 as the code goes at the top of RAM.

Below is outdated

0xFF00 is the actual ROM location where the ops list are to be written. for my patch, bank 8 is what we are going after. Keep in mind, this patch will most likely work for 99% of all 4 bank strategies but you MUST VERIFY this address contains null filler and no code. Note: Usually, only the inserting jump to patch code address would need to be updated to be within the main loop later down in "Step X - Write Patch Routine".

These address are the RAM registers you wish to datalog, note that they are LSB first as thats how the Intel ECU accesses ROM.
AC 02 // TOT
00 00 // MARKER FOR END OF LIST
00 00 // MARKET FOR END OF LIST

IMPORTANT NOTE: make sure you do not shadow into RAM!!! RAM is from 1xE000 to 1xFFFF, shadowing in ram will corrupt the ecu and cause odd behavior!!! 1xE000 - 1xDF9A = 0x66 == 102 bytes, highly unlikely you'll ever have that many payloads in the 0x000 to 0x3FF range but noteworthy.

Note: The addresses above are ONLY in the 0x000 to 0x3FF range where registers are inaccessible on the MBUS and must be shadowed. All addresses 0x400 and above will be read directly in Step 6

< 3 > Reply to Q

< 4 > Insert Jump to Patch Code / (BE - QHorse tab in XLS)

For my code, I chose to 'splice' a jump to my new datalogging patch code routine at the tail end of the console routine (8xF66F), you can insert a jump wherever you wish or find most reasonable. I highly recommend using the console routine, it can very easily be found by searching for "= 2062" in your disassembly, you will see another scratch register being set to "= f0" directly beneath it for the rom pointers to be loaded. You want to go to the end of that routine where it 'returns' with the 0xF0 op-code. Usually just before that op-code there is a flag being set that is 3 bytes in length including the op-code. You can rewrite that line and jump to null filler at the end of bank 8 to execute the datalogging patch code. In RZASA, 8xFFDE is tail end of null filler at the end of bank 8. And 8xF66F is the console routine with the line that contains the code we will overwrite to jump to our new patch code routine.

f66f: 71,ef,90 an2b R90,ef ATMR2_FLAG &= ef;
^^ must save the above and put it at the end of the shadowing patch routine so its executed.

I will rewrite this with
f66f: ef,6c,09 scall 8xFFDE
so to do so we simply enter it in...

0x57 0x03 0x06 0xF6 0x6F 0xEF 0x6C 0x09
57 is W in ASCii = Write
03 is the number of bytes to be written
06 is the QH memory slot which corresponds with rom bank 8
F6 6F is the ROM memory location 8xF66F to write the following code
EF 6C 09 is the code to be written

EF 6C 09 in intel disassembly is an 0xEF= call to +0x6C, so being that 8xF672 is the next location +0x6C = F6DE, and 0x09= +0x900; F6DE+0x900 = 8xFFDE is being called.

< 5 > Reply to Q

< 6 > Write Patch Routine

I recommend using the console routine to execute your patch code. If you cannot do so for whatever reason, in mosy 4 bank defs, 8xFFDE is null filler at the very end of bank 8 where I recommend writing your patch code. This should work for all eec-v ecu's as code is not normally written to the very tail end of bank 8.

57 20 06 FF DE A1 9A DF 42 8A 42 00 DF 13 A2 42 46 A2 46 44 65 00 C0 46 C2 46 44 65 02 00 42 27 E8 71 EF 90 F0

57 is W=Write
20 is the number of bytes to write (32 bytes == 0x20 in hex)
06 is the QH memory slot == bank 8 from reference chart above,
8xFFDE is where we are writing the following new subroutine we are creating for the patch code to execute within the rom's code
0xA1 and onward is the actual patch code to write (0xA1 is the load word op-code in intel assembly)
9A DF using Intel LSB == DF9A, this is the address where we wrote our register list of addresses to log

Now you've reached the point where you need to actually start writing some patch code, or just reuse this.

The following is the actual datalogging patch code in my decipha.adx file. Keep in mind, this can be reused on other strategies with only the shadowing address needing to be updated if changed.

Patch Code

This is the actual patch code written in Intel Assembly
A1 9A DF 42 // r42 = DF9A // shadowing address
8A 42 00 DF 13
A2 42 46
A2 46 44
65 00 C0 46 // Offset Address 0xC000 is visible on the MBUS for shadowing
C2 46 44
65 02 00 42
27 E8
71 EF 90 // code overwritten in console routine to insert jump to new patch routine
F0 // return back to console routine and execute normal ecu code flow

Note: The datalogging offset 0xC000 is the ACTUAL QH RAM ADDRESS, there is no additional offset added and it IS NOT added to the Base Address!!!!
Skip down to step 7
----------------------------------------------------------------------------------------------------------------------------------------------------------------
The following is for reference only
CBAZA Patch Code
The following is how the cbaza patch code functions for datalogging for referece, special thanks to derek fenwick for creating this and sharing.

d6d5: a1,08,d7,42 ldw R42,d708 R42 = d708; // list of registers to shadow to mbus
d6d9: a2,43,14 ldw R14,[R42++] R14 = [R42++]; // 14 = register address
d6dc: a2,14,1c ldw R1c,[R14] R1c = [R14]; // 1c = registers value
d6df: c3,15,00,0d,1c stw R1c,[R14+d00] [R14+d00] = R1c; // shadowed =register+offset = value
d6e4: 8a,42,00 cmpw 0,[R42] // check 0 to stop loop
d6e7: d7,f0 jne d6d9 if (0 != [R42]) goto d6d9; // loop until reached end of list
d6e9: a1,22,20,14 ldw R14,2022 R14 = 2022; // lost console code follows
d6ed: 3c,24,01 jb B4,R24,d6f1 if (!B4_R24) {
d6f0: fb ei enable ints; }
d6f1: a1,f0,00,18 ldw R18,f0 R18 = f0;
d6f5: b3,01,20,20,1a ldb R1a,[2020] R1a = [2020];
d6fa: a2,15,1c ldw R1c,[R14++] R1c = [R14++];
d6fd: c2,19,1c stw R1c,[R18++] [R18++] = R1c;
d700: e0,1a,f7 djnz R1a,d6fa R1a--;
if (R1a != 0) goto d6fa;
d703: 71,ef,24 an2b R24,ef R24 &= ef;
d706: f0 ret return;

d707: ff fill

d708: ac,00 // reg 0xac = start of register list to shadow

d70a: b0,00, // register 0xb0 = 2nd register to shadow
...
d728: 00,00 // end of register list
d72a: 00,00 // end of register list
----------------------------------------------------------------------------------------------------------------------------------------------------------------

SuperLogger Configuration

ADX Header Config
Connection Command:	None
Monitor Command:	Harvest Data Macro
Disconnect Command:	None
Pause Command:	VersionFetch
Unpause Command:	VersionFetch

SUPERLOGGER SEND COMMANDS
Title	Unique ID	Description	Baud	Hex CMD String	Checksum	Manually Sendable
Set Accel Param	setaccelparam		0	0x41 0x01 0x2B 0x02	Sum 0x6F	N,N
Set LogBut Active Startup Inactive	setlogbutactsu		0	0x44 0x4F 0x61	Sum 0xF4	N,N
DR: Configure Packet	D_R_QH		0	0x44 0x52 0xFF 0x00 0xC8 0x00 0x01 0x01 0x74 0x71	Sum 0x44	N,N
readeepreq	readeepreq		0	0x48 0x52 0x80 0x05 0x00	Sum 0x1F	N,N
PT close lastbyte	ptlastbyteclos		0	0x74	None -
SL DS Setup for Patchetc	SLDS		0	0x44 0x53 0x0A 0x0B 0x0C 0x0D 0x03 0xFE 0x00 0x51 0x4A 0x01 0x03 0x0D 0xB1 0x01 0x03 0x0D 0xB0 0x02 0x03 0x02 0x50 0x02 0x03 0x02 0x4E 0x02 0x03 0x02 0x5C 0x02 0x03 0x02 0x60 0x02 0x03 0x02 0x0A 0x02 0x03 0x02 0x0C 0x02 0x03 0x07 0xB4 0x02 0x03 0x07 0xB6 0x02 0x03 0x02 0x06 0x02 0x03 0x02 0x08 0x02 0x03 0x01 0x1C 0x02 0x03 0x01 0x1E 0x02 0x03 0x01 0x16 0x02 0x03 0x0D 0xAE 0x01 0x03 0x02 0x9F 0x01 0x03 0x02 0xBD 0x02 0x03 0x02 0x9A 0x02 0x03 0x0D 0xAA 0x01 0x03 0x0D 0xD0 0x02 0x03 0x01 0x26 0x01 0x03 0x02 0x11 0x02 0x03 0x01 0x8C 0x02 0x03 0x01 0x88 0x01 0x03 0x01 0x2F 0x01 0x03 0x01 0x66 0x02 0x03 0x01 0x5C 0x02 0x03 0x0D 0xB8 0x01 0x03 0x01 0x57 0x01 0x03 0x01 0x6B 0x02 0x03 0x01 0x54 0x01 0x03 0x0D 0xEE 0x01 0x03 0x0D 0xE7 0x01 0x03 0x0D 0x26 0x01 0x03 0x0D 0x27 0x01 0x03 0x0D 0xEC 0x01 0x03 0x0D 0xE9 0x01 0x03 0x0D 0x29 0x01 0x03 0x0D 0x28 0x01 0x03 0x0D 0x2E 0x01 0x03 0x0D 0xEF 0x02 0x03 0x02 0x52 0x02 0x03 0x02 0x58 0x02 0x03 0x02 0x56 0x01 0x03 0x02 0xDC 0x01 0x03 0x01 0x2C 0x02 0x03 0x01 0x68 0x02 0x03 0x0D 0xD2 0x01 0x03 0x02 0x88 0x01 0x03 0x01 0x93 0x02 0x03 0x01 0x8E 0x02 0x03 0x03 0x2A 0x02 0x03 0x03 0xA6 0x02 0x03 0x03 0x30 0x02 0x03 0x02 0x9C 0x02 0x03 0x01 0x6C 0x01 0x03 0x02 0x9E 0x02 0x03 0x01 0x24 0x02 0x03 0x07 0xE4 0x02 0x03 0x07 0xE6 0x02 0x03 0x07 0xE8 0x02 0x03 0x07 0xEA 0x02 0x00 0x01 0x03 0x2B 0x01 0x01 0x44 0x01 0x03 0xFF 0xFE 0x01 0x03 0x02 0x72 0x01 0x03 0x0D 0xC8 0x01 0x03 0x0D 0xC9 0x01 0x03 0x01 0x4D 0x01 0x03 0x01 0x48 0x02 0x03 0x01 0x14 0x02 0x03 0x01 0x12 0x02 0x03 0x01 0x80 0x01 0x03 0x0D 0xCB 0x24 0x4F	Sum 0x8B	N,N
SLSetupSimple	SetupSimple		0	0x44 0x53 0x0A 0x0B 0x0C 0x0D 0x02 0x80 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x80 0x00 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01	Sum 0xC7	N,N
Read Time Request	readtimereq		0	0x44 0x54 0x52 0x00 0x08	Sum 0xF2	n,n
QH Patch Send	qhpatch		0	0x57 0x3D 0x07 0x84 0xB2 0xA1 0xEE 0x84 0x42 0xA2 0x43 0x14 0xA2 0x14 0x1C 0xC3 0x15 0x00 0x0D 0x1C 0x8A 0x42 0x00 0xD7 0xF0 0xA1 0x22 0x20 0x14 0x3C 0x24 0x01 0xFB 0xA1 0xF0 0x00 0x18 0xB3 0x01 0x20 0x20 0x1A 0xA2 0x15 0x1C 0xC2 0x19 0x1C 0xE0 0x1A 0xF7 0x71 0xEF 0x24 0xA3 0x01 0xFC 0xFF 0x42 0xC3 0x01 0xFE 0xFF 0x42 0xF0 0x00	Sum 0xA2	n,n
QH Patch Send 2	patch2		0	0x57 0x21 0x07 0x84 0xEE 0xB0 0x00 0xAE 0x00 0xAA 0x00 0xD0 0x00 0xB8 0x00 0xEE 0x00 0xE6 0x00 0x26 0x00 0xEC 0x00 0xE8 0x00 0x28 0x00 0x2E 0x00 0xD2 0x00 0xC8 0x00 0xCA 0x00 0x00 0x00 0x00	Sum 0x09	n,n
QH Config Single	qhsingleconfig		0	0x51 0x4A 0x01 0x03 0x0D 0xB1 0x01 0x03 0x0D 0xB0 0x02 0x03 0x02 0x50 0x02 0x03 0x02 0x4E 0x02 0x03 0x02 0x5C 0x02 0x03 0x02 0x60 0x02 0x03 0x02 0x0A 0x02 0x03 0x02 0x0C 0x02 0x03 0x07 0xB4 0x02 0x03 0x07 0xB6 0x02 0x03 0x02 0x06 0x02 0x03 0x02 0x08 0x02 0x03 0x01 0x1C 0x02 0x03 0x01 0x1E 0x02 0x03 0x01 0x16 0x02 0x03 0x0D 0xAE 0x01 0x03 0x02 0x9F 0x01 0x03 0x02 0xBD 0x02 0x03 0x02 0x9A 0x02 0x03 0x0D 0xAA 0x01 0x03 0x0D 0xD0 0x02 0x03 0x01 0x26 0x01 0x03 0x02 0x11 0x02 0x03 0x01 0x8C 0x02 0x03 0x01 0x88 0x01 0x03 0x01 0x2F 0x01 0x03 0x01 0x66 0x02 0x03 0x01 0x5C 0x02 0x03 0x0D 0xB8 0x01 0x03 0x01 0x57 0x01 0x03 0x01 0x6B 0x02 0x03 0x01 0x54 0x01 0x03 0x0D 0xEE 0x01 0x03 0x0D 0xE7 0x01 0x03 0x0D 0x26 0x01 0x03 0x0D 0x27 0x01 0x03 0x0D 0xEC 0x01 0x03 0x0D 0xE9 0x01 0x03 0x0D 0x29 0x01 0x03 0x0D 0x28 0x01 0x03 0x0D 0x2E 0x01 0x03 0x0D 0xEF 0x02 0x03 0x02 0x52 0x02 0x03 0x02 0x58 0x02 0x03 0x02 0x56 0x01 0x03 0x02 0xDC 0x01 0x03 0x01 0x2C 0x02 0x03 0x01 0x68 0x02 0x03 0x0D 0xD2 0x01 0x03 0x02 0x88 0x01 0x03 0x01 0x93 0x02 0x03 0x01 0x8E 0x02 0x03 0x03 0x2A 0x02 0x03 0x03 0xA6 0x02 0x03 0x03 0x30 0x02 0x03 0x02 0x9C 0x02 0x03 0x01 0x6C 0x01 0x03 0x02 0x9E 0x02 0x03 0x01 0x24 0x02 0x03 0x07 0xE4 0x02 0x03 0x07 0xE6 0x02 0x03 0x07 0xE8 0x02 0x03 0x07 0xEA 0x01 0x03 0x01 0x44 0x01 0x03 0xFF 0xFE 0x01 0x03 0x02 0x72 0x01 0x03 0x0D 0xC8 0x01 0x03 0x0D 0xC9 0x01 0x03 0x01 0x4D 0x01 0x03 0x01 0x48 0x02 0x03 0x01 0x14 0x02 0x03 0x01 0x12 0x02 0x03 0x01 0x80 0x01 0x03 0x0D 0xCB	Sum 0x24	n,n
QH Config Single Simplified	QHSIMPLE		0	0x51 0x4A 0x01 0x03 0x0D 0xB1 0x01 0x03 0x0D 0xB0 0x02 0x03 0x02 0x50 0x02 0x03 0x02 0x4E 0x02 0x03 0x02 0x5C 0x02 0x03 0x02 0x60 0x02 0x03 0x02 0x0A 0x02 0x03 0x02 0x0C 0x02 0x03 0x07 0xB4 0x02 0x03 0x07 0xB6 0x02 0x03 0x02 0x06 0x02 0x03 0x02 0x08 0x02 0x03 0x01 0x1C 0x02 0x03 0x01 0x1E 0x02 0x03 0x01 0x16 0x02 0x03 0x0D 0xAE 0x01 0x03 0x02 0x9F 0x01 0x03 0x02 0xBD 0x02 0x03 0x02 0x9A 0x02 0x03 0x0D 0xAA 0x01 0x03 0x0D 0xD0 0x02 0x03 0x01 0x26 0x01 0x03 0x02 0x11 0x02 0x03 0x01 0x8C 0x02 0x03 0x01 0x88 0x01 0x03 0x01 0x2F 0x01 0x03 0x01 0x66 0x02 0x03 0x01 0x5C 0x02 0x03 0x0D 0xB8 0x01 0x03 0x01 0x57 0x01 0x03 0x01 0x6B 0x02 0x03 0x01 0x54 0x01 0x03 0x0D 0xEE 0x01 0x03 0x0D 0xE7 0x01 0x03 0x0D 0x26 0x01 0x03 0x0D 0x27 0x01 0x03 0x0D 0xEC 0x01 0x03 0x0D 0xE9 0x01 0x03 0x0D 0x29 0x01 0x03 0x0D 0x28 0x01 0x03 0x0D 0x2E 0x01 0x03 0x0D 0xEF 0x02 0x03 0x02 0x52 0x02 0x03 0x02 0x58 0x02 0x03 0x02 0x56 0x01 0x03 0x02 0xDC 0x01 0x03 0x01 0x2C 0x02 0x03 0x01 0x68 0x02 0x03 0x0D 0xD2 0x01 0x03 0x02 0x88 0x01 0x03 0x01 0x93 0x02 0x03 0x01 0x8E 0x02 0x03 0x03 0x2A 0x02 0x03 0x03 0xA6 0x02 0x03 0x03 0x30 0x02 0x03 0x02 0x9C 0x02 0x03 0x01 0x6C 0x01 0x03 0x02 0x9E 0x02 0x03 0x01 0x24 0x02 0x03 0x07 0xE4 0x02 0x03 0x07 0xE6 0x02 0x03 0x07 0xE8 0x02 0x03 0x07 0xEA 0x01 0x03 0x01 0x44 0x01 0x03 0xFF 0xFE 0x01 0x03 0x02 0x72 0x01 0x03 0x0D 0xC8 0x01 0x03 0x0D 0xC9 0x01 0x03 0x01 0x4D 0x01 0x03 0x01 0x48 0x02 0x03 0x01 0x14 0x02 0x03 0x01 0x12 0x02 0x03 0x01 0x80 0x01 0x03 0x0D 0xCB	Sum 0x24	n,n
Passthrough Begin	ptbegin		0	0x70 0x70	Sum 0xE0	n,n
d: Query for packet	QUERY		0	0x64	None -	n,n
DOLI: Request Onboard Status	REQSTATUS		0	0x44 0x4F 0x4C 0x49	Sum 0x28	n,n
VV: Request Version	VER_REQ		0	0x56 0x56	None -	n,n
DOCYsend	DOCYsend		0	0x44 0x4F 0x43 0x59	Sum 0x2F	n,n
DOCNsend	DOCNsend		0	0x44 0x4F 0x43 0x4E	Sum 0x24	n,n
DOEsend	DOEsend		0	0x44 0x4F 0x45	Sum 0xD8	n,n
DOLYsend	DOLYSEND		0	0x44 0x4F 0x4C 0x59	Sum 0x38	n,n
DOLNsend	DOLNSEND		0	0x44 0x4F 0x4C 0x4E	Sum 0x2D	n,n
DOLysend	DOLySEND		0	0x44 0x4F 0x4C 0x79	Sum 0x58	n,n
DOLnsend	DOLnSEND		0	0x44 0x4F 0x4C 0x6E	Sum 0x4D	n,n
DLsend	DLSEND	This should set things up to log no ADC, do a 10:1 skip ratio for logging, and no conditional windows. So every 10th frame will get stored.	0	0x44 0x4C 0x00 0x00 0x00 0x00 0x00	Sum 0x90	Y,Y
Exit Passthrough	exitpass		0	0x45 0x78 0x69	None -	n,n

SUPERLOGGER MACRO COMMANDS
Title	Unique ID	Description	Manually Sendable	Macros Repeat Count	Command	Entry Repeat Count	BOF,BOS
AccelMacro	accelmacro		Y,Y	1	Set Accel Param
					Okay Response	1
Initialize Settings	Init		Y,Y	1	QH Config Macro
					Configure SL for Payload
					DL: Configure Onboad Logging Structure
					DOCN: Turn Compression Off
					DOLN: Disable Onboard Logging
					DOLn: Disable Background Polling	1	n,n
Set Logbut ActiveMac	setlogbutactma		Y,Y	1	Set LogBut Active Startup Inactive
					Okay Response	1	n,n
Configure SL for Payload	CONFIG		Y,Y	1	Pause for Data Rate
					DR: Configure Packet
					Okay Response	1	n,n
Read EEP	readeepmac		Y,Y	1	readeepreq
					eepreadrec	1	n,n
SL Setupstring	SLSTRING		Y,Y	1	SL DS Setup for Patchetc
					Okay Response	1	n,n
Passthrough Start	ptstart		Y,Y	1	Passthrough Begin
					Okay Response	1	n,n

QH Config Macro	qhconfigmacro	Y,Y	1	Passthrough Start
				VersionFetch
				QH Patch Send
				Okay Response
				QH Patch Send 2
				Okay Response
				QH Config Single
				1 Second Pause
				Okay Reponse
				Passthrough End / Version Fetch	1	n,n

Passthrough End / Version Fetch	DISCON	Y,Y	1	Pause for Data Rate
				Exit Passthrough
				Bytes for Drain
				PT close lastbyte
				VV: Version Response	1	n,n

QH Config Basic	qhconfig basic	Y,Y	1	QH Config Single
				1 second Pause
				Okay Response
				VersionFetch	1	n,n

SL Setup Simple Macro	slsetmacsimple		Y,Y	1	SLSetupSimple
					Okay Response	1	n,n

ReadTime Macro	readmac		Y,Y	1	Read Time Request
					ReadTimeResp	1	n,n

Pass-Patch-Return	passpatch	Y,Y	1	Passthrough Start
				VersionFetch
				QH Patch Send
				QH Patch Send 2
				Okay Response
				VersionFetch
				Passthorugh End / Version Fetch	1	n,n

Poll Status Macro	POLLSTATUS		Y,Y	1	DOLI: Request Onboard Status
					DOLI: Retrieve Status	1	n,n

DOE: Erase DataFlash Onboard Memory	ERASE_DF	Y,Y	1	DOEsend
				1 Second Pause
				1 Second Pause
				1 Second Pause
				1 Second Pause
				1 Second Pause
				1 Second Pause
				1 Second Pause
				1 Second Pause
				1 Second Pause
				1 Second Pause
				1 Second Pause
				okay Response LongErase	1	n,n

Monitor Macro	MONITOR		n,n	1	Harvest Data Macro
					Poll Status Macro	1	n,n

Harvest Data Macro	HARVEST	Y,Y	1	d: Query for packet
				d: Harvest Packet
				Okay Response
				Pause for Data Rate	1	n,n

HarvestBoth	harvestboth		n,n	1	d: Harvest Packet
					d: Harvest Extras	1	n,n

VersionFetch	verfetch		Y,Y	1	VV: Request Version
					VV: Version Response	1	n,n

DOCY: Turn Compression On	COMPRESS_Y		Y,Y	1	DOCYsend
					Okay Response	1	n,n

DOCN: Turn Compression Off	COMPRESS_N		Y,Y	1	DOCNsend
					Okay Response	1	n,n

DOLY: Enable Onboard Logging	ONBOARD_Y		Y,Y	1	DOLYsend
					Okay Response	1	n,n

DOLN: Disable Onboard Logging	ONBOARD_N		Y,Y	1	DOLNsend
					Okay Response	1	n,n

DOLy: Enable Background Polling	POLLING_y		Y,Y	1	DOLysend
					Okay Response	1	n,n

DOLn: Disable Background Polling	POLLING_n		Y,Y	1	DOLnsend
					Okay Response	1	n,n

DL: Configure Onboard Logging Structure	CONFIGURE_LOGS		Y,Y	1	DLsend
					Okay Response	1	n,n

SUPERLOGGER LISTEN PACKET COMMANDS
Title	Unique ID	Description	Baud	Process Data	Packet Type	Header	Footer	Timeout	Body Size	Payload Offset	Payload Size
eepreadrec	eepreadrec		0	N	Static			400	400	0	0
Bytes for Drain	Drainbytes		0	n	Static			20	3	0	3
ReadTimeResp	ReadTimeResp		0	Y	Static			400	10	0	10
d: Harvest Packet	PACKET		0	Y	Static			400	159	0	159
d: Harvest Extras	extraharv		0	Y	Static			400	41	0	41
DOLI: Retrieve Status	GETSTATUS		0	Y	Static			400	17	0	17
VV: Version Response	VERSION_RESP		0	n	Static		400	2	0	2
Okay Response	OK		0	Y	Static			1000	1	0	1
Okay Response LongErase	OKLONG		0	N	Static		100000	1	0	1

SUPERLOGGER SILENCE/TIMEOUT COMMANDS
Title	Unique ID	Description	Baud	Silence Length	Timeout
Pause for Data Rate	WAIT	This timeout mS value can be adjusted to 100 for 10 samples per second.	0	0	5
1 Second Pause	1SEC		0	0	800

Important Ford Variables

j1979_01_06	SCP Lambse1 byte
j1979_01_08	SCP Lambse2 byte
R63	"new_data"